NEC Corporation has announced the development of chip-stacked flexible memory, which can be used to achieve a new system-on-chip (SoC) architecture.
The new SoC’s architecture consists of separate logic (excluding embedded memory cores) and memory chips (chip-stacked flexible memory) that are closely stacked by using a three-dimensional packaging technology.
NEC developed both a reconfigurable-memory technology that enables the memory chip to change its configuration flexibly, in addition to a memory-data transmission technology that reduces chip-area and latency caused by memory reconfiguration mechanisms.
The memories of conventional SoCs are categorized into two types; embedded memory, such as embedded SRAM or embedded DRAM, which is integrated with logic circuits in an SoC chip; and the second type, general-purpose memory, such as DRAM or Flash memory, which is placed outside of an SoC chip.
The chip-stacked flexible memory developed by NEC is a third kind of memory that features both fast access in the embedded memory and large memory size in the general-purpose memory.
It also enables dynamic memory allocation during LSI operation that is effective in SoC’s multiple functional IP-cores (functional blocks), which reduces SoCs’ design and fabrication costs.
NEC is targeting large-scale SoC or high-performance tiled core designs, such as those found in Terascale and even GPU-like designs.